Pre-Silicon Chip Engineers
2 zile în urmă


Language (HDL) VHDL and / or

  • SystemVerilog / Logic Design, Logic Modeling, Very Large System Integration (VLSI), micro architecture, Functional
  • State Machine (FSM). UNIX / Linux environment Simulation and Synthesis : Linting (Parser), Design Rule Check
  • DRC) , Digital simulation (Simulation), Synthesis (RTL to Gate), Static Timing Analysis (STA)

  • Excellent communication skills Advantage : Networking protocols knowledge, Equivalence Check (EC, LEC) ,
  • Primetime, Design Compiler (DC), VCS, SpyGlass
  • Benefits

  • Ability to work with a global company and immerse in a variety of international projects with different cultures within the IT industry
  • Supportive environment and great co-workers
  • Private Health insurance+ hospitalization package
  • Private Dental insurance
  • Gym subscription
  • Vouchers / bonuses for special events (birthday, Christmas, Easter, etc)
  • Meal vouchers of 20 RON / working day (legal value)
  • Access to cutting edge and state of the art technologies current with the everyday evolvement of technologies
  • Development opportunities with free access to over 3000+ training courses and peer to peer mentoring support
  • Reimbursement of public transportation
  • And more...
  • Apply now or find out more on our Career Page

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