Design Engineer (High Speed IO) Rousset, France / B...
Microchip Technology
RO, Bucuresti, Bucharest
5 zile în urmă

Company Description

Company Description :

Microchip Technology Inc. is a leading provider of embedded control applications. Our product portfolio comprises general purpose and specialized 8-bit, 16-bit, and 32-bit microcontrollers, 32-bit microprocessors, field-programmable gate array (FPGA) products, a broad spectrum of high-performance linear, mixed-signal, power management, thermal management, radio frequency (RF), timing, safety, security, wired connectivity and wireless connectivity devices, as well as serial Electrically Erasable Programmable Read Only Memory (EEPROM), Serial Flash memories, Parallel Flash memories, and serial Static Random Access Memory (SRAM).

We also license Flash-IP solutions that are incorporated in a broad range of products.

Job Description

Microchip’s Corporate I / O Design Team is responsible for the definition and implementation of complex High-speed and General Purpose IO’s used by the global product development teams for SoC and ASIC applications.

As a member of Microchip’s engineering community, your responsibility will be to design, simulate, and verify high speed I / O buffers such as (LP)DDR 3 / 4 / 5, Flash IOs, PCIE 3 / 4, etc.

The candidate will participate in all aspects of High-Speed Ultra-Deep-Submicron Planar and FinFET I / O library design in a Linux based infrastructure.

The IO circuit designers duties include :

  • Design, simulation, and optimization of I / O circuits. High Speed IOs (LPDDR / DDR 3 / 4 / 5, Flash IOs, PCIE 3 / 4) operating >
  • 1GHz High speed single ended and differential receiver including ODT PVT compensated output driver with pre-emphasis function

  • Characterization and modeling of I / O libraries to support ASIC and full custom design flows.
  • Understanding of ESD and latch-up requirement for layout.
  • Development and managing of specifications based on customer requirements.
  • Development of test and silicon characterization plans.
  • Providing Datasheet documentation.
  • Release and maintenance of I / O libraries and models.
  • Providing guidance to Layout Engineers for I / O floorplan and layout.
  • Ability to independently support debugging of DRC, LVS and ERC errors.
  • Interface with and support CAD, architects and applications, design and test engineering, technology development and foundries, layout engineering.
  • Support verification staff and timing characterization team.
  • Preferred Skills

  • Strong experience designing >
  • 1GHz IOs

  • Strong experience designing LPDDR / DDR 3 / 4 / 5 and Flash IOs
  • Experience designing analog circuits (current source, amplifier, comparator)
  • Experience designing automated calibration systems
  • Experience designing in deep submicron technologies, FINFET experience is a must
  • Experience designing PCIE 3 / 4, LVDS,and / or eMMC is a plus
  • Experience understanding layout constraints and layout parasitic impact on design.
  • Excellent oral and written communication skills
  • Ability to communicate using English is mandatory
  • Education

  • B.S minimum requirement, Electrical Engineering; M.S. PhD a plus
  • Experience

  • Minimum 10+ years experience in High Speed IOs Design
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